## Description

## Programmable Logic Controllers 5th Edition By Frank Petruzella – Test Bank

1.

Normally, a binary 1 represents the presence of a signal, while a binary 0 represents the absence of a signal.

**TRUE**

*A**c**c**e**ssib**i**lit**y**:** **K**e**y**boa**r**d** **N**av**i**gation Bloom**‘**s**:** **Object** **2.** **C**onceptual **B**l**oo**m**‘s:** **V**e**rb** **2.** **Understand **C**hapter:** **04** **Fundamentals** **of** **Log**i**c Diff**i**cul**t**y:** **E**a**s**y*

*Gradable:** **automat**i**c Learn**i**ng** **O**b**j**ec**t**ive:** **Understand** **bina**r**y** **principles** **and** **logic** **func**t**ions Section:** **04.01** **The** **Binary** **Concept*

*Subtop**i**c:** **B**i**nary** **Pr**i**n**ciples **T**opic:** **Fundamentals** **of** **Log**i**c **U**n**i**ts:** I**mpe**r**ial*

2.

All gates are devices that have one input with which they perform logic decisions and produce a result at one or more of their outputs.

**FA**** ****LSE**

*A**c**c**e**ssib**i**lit**y**:** **K**e**y**boa**r**d** **N**av**i**gation Bloom**‘**s**:** **Object** **2.** **C**onceptual **B**l**oo**m**‘s:** **V**e**rb** **2.** **Understand **C**hapter:** **04** **Fundamentals** **of** **Log**i**c Diff**i**cul**t**y:** **E**a**s**y*

*Gradable:** **automat**i**c Learn**i**ng** **O**b**j**ec**t**ive:** **Understand** **bina**r**y** **principles** **and** **logic** **func**t**ions Section:** **04.01** **The** **Binary** **Concept*

*Subtop**i**c:** **B**i**nary** **Pr**i**n**ciples*

*U**n**i**ts:** I**mpe**r**ial*

3.

All inputs to an AND gate must be 1 to produce a 1 output.

**TRUE**

*A**c**c**e**ssib**i**lit**y**:** **K**e**y**boa**r**d** **N**av**i**gation Bloom**‘**s**:** **Object** **2.** **C**onceptual **B**l**oo**m**‘s:** **V**e**rb** **2.** **Understand **C**hapter:** **04** **Fundamentals** **of** **Log**i**c Dif**f**icu**l**ty:** **M**e**dium*

*Gradable:** **automat**i**c Learn**i**ng** **O**b**j**ec**t**ive:** **Understand** **bina**r**y** **principles** **and** **logic** **func**t**ions Sect**i**on:** **04.02** **AND,** **OR,** **and** **NOT** **Func**t**ions*

*Subtop**i**c:** **B**i**nary** **Pr**i**n**ciples **T**opic:** **Fundamentals** **of** **Log**i**c **U**n**i**ts:** I**mpe**r**ial*

**FA**** ****LSE**

*A**c**c**e**ssib**i**lit**y**:** **K**e**y**boa**r**d** **N**av**i**gation Bloom**‘**s**:** **Object** **2.** **C**onceptual **B**l**oo**m**‘s:** **V**e**rb** **2.** **Understand **C**hapter:** **04** **Fundamentals** **of** **Log**i**c Dif**f**icu**l**ty:** **M**e**dium*

*Gradable:** **automat**i**c Learn**i**ng** **O**b**j**ec**t**ive:** **Understand** **bina**r**y** **principles** **and** **logic** **func**t**ions Sect**i**on:** **04.02** **AND,** **OR,** **and** **NOT** **Func**t**ions*

*Subtop**i**c:** **B**i**nary** **Pr**i**n**ciples **T**opic:** **Fundamentals** **of** **Log**i**c **U**n**i**ts:** I**mpe**r**ial*

5.

Only one input to an OR gate must be 1 to produce a 1 output.

**TRUE**

*A**c**c**e**ssib**i**lit**y**:** **K**e**y**boa**r**d** **N**av**i**gation Bloom**‘**s**:** **Object** **2.** **C**onceptual **B**l**oo**m**‘s:** **V**e**rb** **2.** **Understand **C**hapter:** **04** **Fundamentals** **of** **Log**i**c Dif**f**icu**l**ty:** **M**e**dium*

*Gradable:** **automat**i**c Learn**i**ng** **O**b**j**ec**t**ive:** **Understand** **bina**r**y** **principles** **and** **logic** **func**t**ions Sect**i**on:** **04.02** **AND,** **OR,** **and** **NOT** **Func**t**ions*

*Subtop**i**c:** **B**i**nary** **Pr**i**n**ciples **T**opic:** **Fundamentals** **of** **Log**i**c **U**n**i**ts:** I**mpe**r**ial*

6.

All inputs to a NOR gate must be 1 to produce a 1 output.

**FA**** ****LSE**

*A**c**c**e**ssib**i**lit**y**:** **K**e**y**boa**r**d** **N**av**i**gation Bloom**‘**s**:** **Object** **2.** **C**onceptual **B**l**oo**m**‘s:** **V**e**rb** **2.** **Understand **C**hapter:** **04** **Fundamentals** **of** **Log**i**c Dif**f**icu**l**ty:** **M**e**dium*

*Gradable:** **automat**i**c Learn**i**ng** **O**b**j**ec**t**ive:** **Understand** **bina**r**y** **principles** **and** **logic** **func**t**ions Sect**i**on:** **04.02** **AND,** **OR,** **and** **NOT** **Func**t**ions*

*Subtop**i**c:** **B**i**nary** **Pr**i**n**ciples **T**opic:** **Fundamentals** **of** **Log**i**c **U**n**i**ts:** I**mpe**r**ial*

7.

Inverting the output of an OR gate will result in creating a NOR gate.

**TRUE**

*A**c**c**e**ssib**i**lit**y**:** **K**e**y**boa**r**d** **N**av**i**gation Bloom**‘**s**:** **Object** **2.** **C**onceptual **B**l**oo**m**‘s:** **V**e**rb** **2.** **Understand **C**hapter:** **04** **Fundamentals** **of** **Log**i**c Dif**f**icu**l**ty:** **M**e**dium*

*Gradable:** **automat**i**c Learn**i**ng** **O**b**j**ec**t**ive:** **Understand** **bina**r**y** **principles** **and** **logic** **func**t**ions Sect**i**on:** **04.02** **AND,** **OR,** **and** **NOT** **Func**t**ions*

*Subtop**i**c:** **B**i**nary** **Pr**i**n**ciples **T**opic:** **Fundamentals** **of** **Log**i**c **U**n**i**ts:** I**mpe**r**ial*

**FA**** ****LSE**

*A**c**c**e**ssib**i**lit**y**:** **K**e**y**boa**r**d** **N**av**i**gation Bloom**‘**s**:** **Object** **2.** **C**onceptual **B**l**oo**m**‘s:** **V**e**rb** **2.** **Understand **C**hapter:** **04** **Fundamentals** **of** **Log**i**c Dif**f**icu**l**ty:** **M**e**dium*

*Gradable:** **automat**i**c Learn**i**ng** **O**b**j**ec**t**ive:** **Understand** **bina**r**y** **principles** **and** **logic** **func**t**ions Sect**i**on:** **04.02** **AND,** **OR,** **and** **NOT** **Func**t**ions*

*Subtop**i**c:** **B**i**nary** **Pr**i**n**ciples **T**opic:** **Fundamentals** **of** **Log**i**c **U**n**i**ts:** I**mpe**r**ial*

9.

A two input OR function, expressed as a Boolean equation, would be *Y=** **AB*.

**FA**** ****LSE**

*A**c**c**e**ssib**i**lit**y**:** **K**e**y**boa**r**d** **N**av**i**gation Bloom**‘**s**:** **Object** **2.** **C**onceptual **B**l**oo**m**‘s:** **V**e**rb** **2.** **Understand **C**hapter:** **04** **Fundamentals** **of** **Log**i**c Dif**f**icu**l**ty:** **M**e**dium*

*Gradable:** **automat**i**c Learn**i**ng** **O**b**j**ec**t**ive:** **Recogn**i**ze** **equivalent** **Boolean** **exp**r**essions,** **l**ogic** **ci**r**c**u**i**ts,** **boolean** **exp**r**essions** **and** **t**ruth** **tables Section:** **04.03** **Boolean** **Algebra*

*Subtopic:** **Logic** **Equ**i**valents **T**opic:** **Fundamentals** **of** **Log**i**c **U**n**i**ts:** I**mpe**r**ial*

10.

Hardwired logic refers to logic control functions determined by the way devices are interconnected.

**TRUE**

*A**c**c**e**ssib**i**lit**y**:** **K**e**y**boa**r**d** **N**av**i**gation Bloom**‘**s**:** **Object** **2.** **C**onceptual **B**l**oo**m**‘s:** **V**e**rb** **2.** **Understand **C**hapter:** **04** **Fundamentals** **of** **Log**i**c Dif**f**icu**l**ty:** **M**e**dium*

*Gradable:** **automat**i**c Learn**i**ng** **O**b**j**ec**t**ive:** **Recogn**i**ze** **equivalent** **Boolean** **exp**r**essions,** **l**ogic** **ci**r**c**u**i**ts,** **boolean** **exp**r**essions** **and** **t**ruth** **tables Sec**t**ion:** **04.06** **Ha**r**dw**i**r**e**d** **Logic** **versus** **P**r**ogram**m**e**d** **Log**i**c*

*Subtopic:** **Logic** **Equ**i**valents **T**opic:** **Fundamentals** **of** **Log**i**c Units:** **NA*

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